www.iterrac.com IT6145 duobinary encoder and driver amplifier (preliminary information) this is a preliminary data sheet. see ?product status definitions? on web site or catalog for product development status. february 28, 2006 doc. 4085 rev 0 1 iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937, fax (650) 424-1938 description features device diagram ? complete, compact duo-binary transmitter solution ? adjustable output voltage from 5.0 to 9.0 vpp ? power dissipation: 5 w ? 16-mm smt ceramic package with bottom pad grounding and heat sinking ? differential data and clock inputs ? integral output level detector for agc loop control absolute maximum ratings o c 125 storage temperature tc_max_st o c 75 case temperature (operating) tc_max_op v -10 -5 vdc supply input v-5_max v 10 +8 vdc supply input v8_max v vcc+0.6 vcc-2 clock/data input vsig_max unit maximum minimum parameter symbol the IT6145 combines a duobinary encoder, driver amplifier, and fifth-order bessel low- pass filter in a compact module. it is designed for use in the transmitters (transponders) of long-haul duobinary optical communication links . the microchip module is suitable for use in standard 300-pin msa modules and is housed in a rugged enclosure. the output of the IT6145 is a duobinary encoded signal with the correct bandwidth and amplitude to directly drive a m-z optical modulator. the output level is adjustable from 5 to 9 vpp to allow for variations in modulator vpi. an internal detector provides a temperature-stable dc voltage that is proportional to the output data amplitude, facilitating the use of agc loops to set the output level. the clock and data i nputs can be driven either differentially for maximum sensitivity, or single ended with the unused inputs terminated in 50 ohms.
www.iterrac.com IT6145 duobinary encoder and driver amplifier (preliminary information) this is a preliminary data sheet. see ?product status definitions? on web site or catalog for product development status. february 28, 2006 doc. 4085 rev 0 2 iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937, fax (650) 424-1938 electrical characteristics at ambient temperature ma 40 output set to 9.0 vpp -5 v -5.0 v supply 11 ma 600 output set to 9 vpp +8 v 8 v supply current 10 v 5 to 12 v_amp level adjust input 9 mv -170 7 vpp output vdet power detector output 8 vpp 5.0 level adjust control set to min. vout_min minimum output voltage amplitude 7 vpp 9.0 level adjust control set for max. vout_max maximum output voltage amplitude 6 0.46 vout at end of pulse vout at start of 1 s pulse droop long pulse droop (from low-frequency- cutoff) 5 ps tbd jitter degradation from optimum setting of tbd ps ph_d-c data-clock phase margin 4 vpp 1.0 0.3 differential vin_pp input amplitude (clock and data) 3 ghz 11.1 9.9 clk_f input clock frequency 2 gb/s 11.1 9.9 din_dr input data rate 1 unit max. typ. min. conditions symbol parameter # % 0.4 0.3 f/2_rat half clock ratio (note 5) % 65 -1eo -1 level eye opening (note 4) % 65 +1eo +1 level eye opening (note 3) ps 5 skew skew (note 2) ps p-p 25 j0 0 jitter (note 1) 3 ps p-p 20 j-1 -1 jitter (note 1) 2 ps p-p 20 j+1 +1 jitter (note 1) 1 unit max. typ. min. symbol parameter # eye specifications 1. see jitter definition (p. 3). 2. see eye skew definition (p. 3). 3. see eye opening definition (p. 3) +1eo = va/vb*100. 4. see eye opening definition (p. 3) -1eo = vc/vd*100. 5. see half clock amplitude ratio definition (p. 3) f/2_rat = va/vb.
www.iterrac.com IT6145 duobinary encoder and driver amplifier (preliminary information) this is a preliminary data sheet. see ?product status definitions? on web site or catalog for product development status. february 28, 2006 doc. 4085 rev 0 3 iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937, fax (650) 424-1938 jitter definitions eye skew definitions eye opening definitions
www.iterrac.com IT6145 duobinary encoder and driver amplifier (preliminary information) this is a preliminary data sheet. see ?product status definitions? on web site or catalog for product development status. february 28, 2006 doc. 4085 rev 0 4 iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937, fax (650) 424-1938 half-clock amplitude ratio definition timing diagram
www.iterrac.com IT6145 duobinary encoder and driver amplifier (preliminary information) this is a preliminary data sheet. see ?product status definitions? on web site or catalog for product development status. february 28, 2006 doc. 4085 rev 0 5 iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937, fax (650) 424-1938 chip dimensions and pinouts
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